1. Field of the Invention
The present invention generally relates to testing a flash memory device using Direct Memory Access (DMA). More particularly, analog multiplexer structures of an SRAM matrix permit complementary SRAM bit lines having leakage effects that cancel each other to be selected, to provide a DMA path to selected cells of a NAND matrix, from the I/O pads of the device through a page buffer of the NAND matrix, to permit testing of the NAND matrix cells and bit line leakage.
2. Description of the Related Art
Direct Memory Access (DMA) is a technique commonly used in the art to measure cell current in a flash memory array and to evaluate bit-line leakage.
For example, as described on pages 451-452 of the text “Flash Memories” by Paulo Cappelletti, et al., a pass transistor bypasses a sense amplifier, which allows the direct access from an I/O pad to a selected bit-line. DMA allows the direct access from the I/O pad to the selected bit line. The sense amplifier circuit is disabled and an output buffer is tri-stated. Power supply voltage Vpp can then be applied, through the row decoder, to cell gates in a manner that permits a wide range of addressed cells to be selectively activated for testing. The scheme is repeated systematically for all the 8, 16 (or more) I/O pins. The characteristic of each individual cell inside the array can be observed on the I/O pins.
This DMA technique can be used to monitor the typical cell's current, for production control and/or for process/product characterization. A tight distribution of the cell currents inside the array, after ultraviolet (UV) erase, electrical erase, or after programming, is a key issue for a flash device and is commonly used for evaluation of a new process and process changes.
However, a limitation of this conventional DMA method is the intrinsic slowness of the tester's parametric units, typically tens of milliseconds. To better exploit this capability, some flash testers feature fast parallel parametric units, e.g., one unit per I/O, that allow measuring the currents of 16 cells, in parallel, in a few milliseconds. Nevertheless, measuring a full cell current distribution for a large flash memory may require hours of test time.